1. Technical Field
Embodiments of the present disclosure generally relate to an integrated circuit having a structure including a plurality of semiconductor devices that are stacked.
2. Related Art
Recently, as a packaging technology for an integrated circuit is rapidly developed, an integrated circuit, in which a plurality of semiconductor devices are stacked in a single package, has been suggested. The semiconductor devices stacked in the integrated circuit are formed with electrodes and through-silicon vias. Various internal signals and a variety of power may be transferred through the electrodes and the through-silicon vias.
Bump pads are used to supply the various internal signals and the different power among the plurality of semiconductor devices stacked in the integrated circuit. Such bump pads are designed to have a diameter of several tens of micrometers, for a high speed operation and high integration.
Because such bump pads with the size of several tens of micrometers are too small in size to be probed by the probe pins of test equipment, it is usually found that a semiconductor device is separately formed with probe pads having a size larger than the bump pads, so as to be tested.